Method and device for interpolating or decimating a signal

ABSTRACT

A method and a device for interpolating or decimating a signal is provided, the signal being processed by a plurality of signal processing means connected in series, which at least comprise means for increasing or reducing a clock rate of the signal and filtering means. To achieve adaptation to different operating modes or transmission standards, individual portions of the signal processing means connected in series can be bridged by bypasses. In addition, filtering parameters of the filtering means can be varied and factors, by which a clock rate of the signal is increased or reduced, can be changed.

The present invention relates to a method and to a device for interpolating or decimating a signal, in particular an ADSL (Asymmetric Digital Subscriber Line) signal.

Data transmission, in particular of Internet data, using the ADSL standard, for example, is becoming increasingly more important inter alia in the private sector. As constantly increasing amounts of data have to be transmitted, the ADSL standard also has to be constantly developed and thus there are, for example, the transmission modes ADSL, ADSL+, ADSL2, ADSL2+ (including ADSL long reach), ADSL++ and ADSL2++ as well as a diagnostic mode called DrDSL. The ADSL types or ADSL flavours can be operated using single inverse fast Fourier transformation (1xIFFT) and apart from ADSL++ ADSL2++ also with double inverse fast Fourier transformation (2xIFFT).

In order to process ADSL data, interpolation or decimation of the data is required. A useful signal singly or doubly oversampled (1xIFFT/2xIFFT) by a data pump can be processed in an interpolation path. A received signal singly/doubly oversampled accordingly can be provided to a data pump in a decimation path. A higher data rate is achieved in each case due to the oversampling.

It is now desirable to provide circuits which can process a large number of ADSL transmission modes. One possibility for this purpose is to provide a separate interpolation path or decimation path for each ADSL transmission mode, a changeover being made between the paths, depending on the transmission standard currently being used. However, a solution of this type requires a large chip area and is therefore expensive to produce and it also has a relatively high power dissipation.

An object of the present invention is therefore to provide a method and a device for interpolating or decimating a signal, wherein a small chip area is required to implement the method and device and a power dissipation is reduced.

The object is achieved by embodiments of methods or devices according to the present invention.

In accordance with the invention, for interpolating a signal it is proposed that the signal is processed by a plurality of signal processing means connected in series and which at least comprise means for increasing a clock rate of the signal and filtering means, wherein three different measures can be taken, independently of each other, but also in combination with each other, for adaptation to different transmission modes of the signal, for example different ADSL standards:

Firstly, a portion of the signal processing means connected in series can be bypassed as a function of the transmission mode of the signal, the portion of the signal processing means connected in series preferably comprising a filtering means of the filtering means and/or a means for increasing a clock rate of the signal of the means for increasing a clock rate of the signal.

Secondly, the means for increasing a clock rate of the signal may comprise a means for increasing the clock rate of the signal by a specific factor, the specific factor being determined as a function of the transmission mode of the signal.

Thirdly, filtering parameters of at least one filtering means of the filtering means can be determined as a function of the transmission mode of the signal. This at least one filtering means can, for example, comprise a low-pass filter, the filtering parameters comprising a threshold frequency of the low-pass filter in this case. The at least one filtering means can also comprise a finite impulse response filter, the filtering parameters comprising filtering coefficients and/or scaling of the finite impulse response filter in this case. The filtering parameters can also comprise an order of the at least one filter.

The means for increasing the frequency can, in the process, carry out zero stuffing, a repetition of values and/or comb filtering. The signal processing means preferably also comprise a digital-to-analog converter, which can also carry out noise shaping for suppressing noise, in order to provide the interpolated signal in analog form.

The above-described measures can also be used in a similar manner in a method for decimating a signal, wherein, in contrast to the case of interpolating a signal, means for reducing a clock rate of the signal instead of means for increasing a clock rate of the signal are provided, wherein, accordingly, as one of the possible measures, a factor, by which the frequency of the signal is reduced, is set as a function of the transmission mode of the signal.

In a manner corresponding to the digital-to-analog converter when interpolating the signal, an analog-to-digital converter, for example with sigma-delta modulators, can be provided when decimating the signal, in order to convert an analog signal into a digital signal for further processing by signal processing means.

As a result of the above-described measures, a single interpolation or decimation path can be provided for a plurality of transmission modes, an adaptation of the path taking place according to the illustrated measures, depending on the required transmission mode.

Means for detecting the transmission mode of the signal and control means for controlling the filter, jumpers or bypasses and/or means for increasing or reducing the frequency of the signal can be provided for controlling the described measures, with which adaptation to the transmission mode of the signal is possible. Detection can take place by means which automatically determine the transmission mode, but it is also possible for this transmission mode to be provided by another circuit or be manually adjusted.

The invention will be described in more detail hereinafter using preferred embodiments and with reference to the accompanying drawings, in which:

FIG. 1 shows an embodiment in accordance with the invention of a device for interpolating a signal, and

FIG. 2 shows an embodiment in accordance with the invention of a device for decimating a signal.

FIG. 1 shows an embodiment in accordance with the invention for interpolating an ADSL signal. The input signal a is a digital signal in this case, which can be an ADSL signal, an ADSL+ signal, an ADSL++ signal with single inverse fast Fourier transformation (1xIFFT) or an ADSL signal or an ADSL+ signal with double inverse fast Fourier transformation (2xIFFT). The signal a has a different clock rate, depending on the ADSL transmission mode.

The signal a is firstly optionally processed by a first means 1 for increasing the clock rate and a first filter 2 or is diverted via a jumper or a bypass 12 past these two signal processing means 1, 2. The selection is made here via a switch 14. The bypass 12 is used here for signals with double inverse Fourier transformation, while signals with single inverse fast Fourier transformation are initially processed by the means 1 for increasing the clock rate. The clock rate is increased by a first factor which can be adjusted as a function of the transmission mode, i.e. the ADSL flavour used, and what is known as zero stuffing is carried out. This means that, during increase of the clock rate by the first factor, the value 0 is allocated to additionally included values.

The first filter 2 is configured as a programmable low-pass filter, of which the threshold frequency is adjusted as a function of the transmission standard or transmission mode to be processed corresponding to the respectively required or desired bandwidth.

The signal is then processed by second means 3 for increasing the clock rate, the clock rate being increased by a constant second factor for all transmission modes. This second means 3 for increasing the clock rate is configured as what is known as a repeater, in other words additionally included data values represent a repetition of a respective preceding data value.

A second low-pass filter 4 adjoins the second means 3 for increasing the clock rate. This second low-pass filter 4 can also be programmed and a threshold frequency is again adjusted as a function of the transmission mode.

The signal is then processed either by a third filter 5 or routed past the third filter 5 via a further bypass 13. This is controlled by a switch 15. In the present case ADSL signals and ADSL+signals are routed via the bypass 13, while ADSL++signals are processed by the third filter 5. The third filter 5 is configured in this case substantially like the second filter 4.

As the next signal processing means there follows an equaliser 6 to level out a ripple in the transmission band. The equaliser 6 is configured as a programmable finite impulse response (FIR) filter, coefficients and/or a scaling factor of the filter being adjusted as a function of the transmission mode to be processed.

A third means 7 for increasing the clock rate adjoins the equaliser 6, and is configured as a comb filter. The clock rate of the signal is increased by a third factor, which can again be adjusted as a function of the transmission mode. The first factor and the third factor are adjusted here—by taking account of the second factor—in such a way that the signal thus generated has a specific uniform clock rate independent of the transmission standard used.

This is followed by a digital-to-analog converter 8 to generate an analog signal from the 16 bit digital signal. What is known as noise shaping is preferably carried out prior to conversion to move the noise into a frequency range in which it can be subsequently filtered out. As the signal fed to the digital-to-analog converter has a fixed clock rate independent of the respective transmission mode, the digital-to-analog converter can also be operated with a constant clock rate, and, compared to a converter with a variable clock rate, this means less power dissipation.

Finally, an analog programmable reconstruction filter 9 (POFI, post filter) is provided. This is configured as a low-pass filter, of which the threshold frequency is again adjusted as a function of the transmission standard used. The conversion of signals with different oversampling results overall in the output signal b, oversampling corresponding to the product of the first to the third factors.

Control of the various filtering parameters, of the first and third factors and of the switches 14 and 15 is assumed here by a first control unit 10 via control lines 11. The control unit 10 can tap the input signal a via a line 16, shown in broken lines, and determine the respective transmission standard in order to automatically adjust the corresponding values. The transmission standard to be treated can, however, also be externally predetermined, for example by a manual adjustment or programming or by a signal from a different circuit unit.

FIG. 2 shows a corresponding circuit path for decimation of a signal c, in this case an analog signal. The signals processed by this circuit path correspond in this case to ADSL signals with the same possible transmission modes as described above with the interpolation path of FIG. 1. DrDSL signals (diagnostic signals) may also be transmitted.

A control unit 25 is also provided here, similar to in FIG. 1, which adjusts the different variable parameters via control lines 24. The transmission standard to be processed can, for example, be externally predetermined via a line 26.

The signal c is firstly processed by an anti-aliasing filter 17 which is configured as an adjustable analog low-pass filter and of which the threshold frequency is again adjusted as a function of the transmission mode of the signal c. An automatic gain control (AGC) can also be provided upstream of the filter 17.

The thus filtered signal is digitised by an analog-to-digital converter. This can, for example, be configured as a sigma-delta converter 18. The analog-to-digital converter operates with a fixed clock rate, so the signal generated thereby has a fixed clock rate. This clock rate is reduced by a first means 19 for reducing the clock rate. This first means 19 for reducing the clock rate is configured as a comb filter, the clock rate is reduced by a fourth factor, the fourth factor being adjusted as a function of the transmission mode of the signal.

The signal thus generated is filtered by a filter 20 which can, for example, be configured as a programmable low-pass filter. The threshold frequency of this filter is again adjusted as a function of the transmission mode used.

A second means 21 for reducing the clock frequency adjoins this filter 20, the clock rate of the signal being reduced by a constant fifth factor independently of the transmission mode used. A further programmable low-pass filter 22 then follows. The threshold frequency is again adjusted as a function of the transmission mode used. An order of the filter 22 is also adjusted as a function of the transmission mode used.

Finally, in a third means 23 for reducing the clock rate, the clock rate of the signal is reduced by a constant sixth factor, again independently of the transmission standard used. The output signal d therefore has a clock rate that depends on the fourth, fifth and sixth factors, which are adjusted or fixed in such a way that a predetermined or desired clock rate of the output signal d is achieved for the respective transmission mode.

Obviously the parameter values, the arrangement and number of the various components and the illustrated transmission standards or transmission modes indicated above are to be understood as being merely exemplary. The interpolation path or decimation path can be accordingly adapted and changed, depending on the signals to be processed. Other types of filter may also be used, instead of those indicated, of which the filtering parameters are then adjusted as a function of the desired transmission mode and/or a predetermined bandwidth. The decimation path—like the interpolation path—may also contain bypasses, if specific signal processing means are to be used only for specific signals. 

1-54. (canceled)
 55. A method for interpolating a signal, comprising: a) processing the signal using a plurality of signal processing elements connected in series, said processing including increasing a clock rate of the signal and filtering the signal, and b) selectively bypassing at least a portion of the plurality of signal processing elements as a function of a transmission mode of the signal.
 56. The method according to claim 55, wherein step b) further comprises selectively bypassing a filter of the plurality of signal processing elements.
 57. The method according to claim 55, wherein step b) further comprises selectively bypassing one or more of the plurality of signal processing elements that are operable to increase the clock rate of the signal.
 58. The method according to claim 55, wherein the signal is an ADSL signal.
 59. The method according to claim 55, wherein the transmission mode of the signal is an ADSL standard.
 60. The method according to claim 55, wherein step a) further comprises increasing the clock rate using at least one a group of consisting of carrying out a zero stuffing, repeating values and comb filtering.
 61. A method for interpolating a signal, comprising: a) processing the signal using a plurality of signal processing elements connected in series, said processing including increasing a clock rate of the signal by a specific factor and filtering the signal, and b) adjusting the specific factor as a function of a transmission mode of the signal.
 62. The method according to claim 61, wherein the signal is an ADSL signal.
 63. The method according to claim 61, wherein the transmission mode of the signal is an ADSL standard.
 64. The method according to claim 61, wherein step a) further comprises increasing the clock rate using at least one a group of consisting of carrying out a zero stuffing, repeating values and comb filtering.
 65. A method for interpolating a signal, comprising: a) processing the signal using a plurality of signal processing elements connected in series, said processing including increasing a clock rate of the signal and filtering the signal using filtering parameters, and b) adjusting the filtering parameters as a function of a transmission mode of the signal.
 66. The method according to claim 65, wherein step a) further comprises filtering the signal using a low-pass filter and wherein the filtering parameters include a threshold frequency of the low-pass filter.
 67. The method according to claim 65, wherein step a) further comprises filtering the signal using a finite impulse response filter and wherein the filtering parameters include at least one of the group consisting of filtering coefficients and a scaling factor.
 68. The method according to claim 65, wherein step a) further comprises filtering the signal using one ore more filters and wherein the filtering parameters comprise an order of the at least one of the one or more filters.
 69. The method according to claim 65, wherein the signal is an ADSL signal.
 70. The method according to claim 65, wherein the transmission mode of the signal is an ADSL standard.
 71. The method according to claim 65, wherein wherein step a) further comprises increasing the clock rate using at least one a group of consisting of carrying out a zero stuffing, repeating values and comb filtering.
 72. A method for decimating a signal, comprising: a) processing the signal using a plurality of signal processing elements connected in series, said processing including decreasing a clock rate of the signal and filtering the signal, and b) selectively bypassing at least a portion of the plurality of signal processing elements as a function of a transmission mode of the signal.
 73. The method according to claim 72, wherein step b) further comprises selectively bypassing a filter of the plurality of signal processing elements.
 74. The method according to claim 72, wherein step b) further comprises selectively bypassing one or more of the plurality of signal processing elements that are operable to decrease the clock rate of the signal.
 75. The method according to claim 72, wherein the signal is an ADSL signal.
 76. The method according to claim 72, wherein the transmission mode of the signal is an ADSL standard.
 77. A method for decimating a signal, comprising: a) processing the signal using a plurality of signal processing elements connected in series, said processing including decreasing a clock rate of the signal by a specific factor and filtering the signal, and b) adjusting the specific factor as a function of a transmission mode of the signal.
 78. The method according to claim 77, wherein the signal is an ADSL signal.
 79. The method according to claim 77, wherein the transmission mode of the signal is an ADSL standard.
 80. A method for decimating a signal, comprising: a) processing the signal using a plurality of signal processing elements connected in series, said processing including decreasing a clock rate of the signal and filtering the signal using filtering parameters, and b) adjusting the filtering parameters as a function of a transmission mode of the signal.
 81. The method according to claim 80, wherein step a) further comprises filtering the signal using a low-pass filter and wherein the filtering parameters include a threshold frequency of the low-pass filter.
 82. The method according to claim 80, wherein step a) further comprises filtering the signal using a finite impulse response filter and wherein the filtering parameters include at least one of the group consisting of filtering coefficients and a finite impulse response scaling factor.
 83. The method according to claim 80, wherein step a) further comprises filtering the signal using one or more filters and wherein the filtering parameters comprise an order of at least one of the one or more filters.
 84. The method according to claim 80, wherein the signal is an ADSL signal.
 85. The method according to claim 80, wherein the transmission mode of the signal is an ADSL standard.
 86. An apparatus configured to interpolate a signal, comprising: a plurality of signal processing elements connected in series operably coupled to receive the signal, the plurality of signal processing elements including one or more elements configured to increase a clock rate of the signal and a filter; a switchable bypass branch operably coupled to switchably bypass a portion of the plurality of signal processing elements; and a control element configured to cause the bypass branch to switchably bypass the portion of the plurality of signal processing elements as a function of a transmission mode of the signal.
 87. The apparatus according to claim 86, wherein the portion of the plurality of signal processing elements includes the filter.
 88. The apparatus according to claim 86, wherein the portion of the plurality of signal processing elements includes the one or more elements configured to increase the clock rate of the signal.
 89. An apparatus configured to interpolate a signal, comprising: a plurality of signal processing elements connected in series operably coupled to receive the signal, the plurality of signal processing elements including one or more elements configured to increase a clock rate of the signal and a filter having adjustable filtering parameters; and a control element configured to selectively adjust the adjustable filtering parameters as a function of a transmission mode of the signal.
 90. The apparatus of claim 89, wherein the filter comprises a low-pass filter and the adjustable filtering parameters include a threshold frequency of the low-pass filter.
 91. The apparatus of claim 89, wherein the filter comprises a finite impulse response filter and the adjustable filtering parameters comprise at least one of the group consisting of filtering coefficients and a scaling factor.
 92. The apparatus of claim 89, wherein the adjustable filtering parameters include an order of the filter.
 93. An apparatus configured to interpolate a signal, comprising: a plurality of signal processing elements connected in series operably coupled to receive the signal, the plurality of signal processing elements including one or more elements configured to increase a clock rate of the signal by a specific factor and a filter; and a control element configured to selectively adjust the specific factor as a function of a transmission mode of the signal.
 94. The apparatus of claim 93, wherein the plurality of signal processing elements includes a digital-to-analog converter.
 95. The apparatus of claim 94, wherein the digital-to-analog converter is configured to carry out noise shaping.
 96. The apparatus of claim 94, wherein the digital-to-analog converter is configured to operate using a fixed clock rate independent of the transmission mode.
 97. An apparatus configured to decimate a signal, comprising: a plurality of signal processing elements connected in series operably coupled to receive the signal, the plurality of signal processing elements including one or more elements configured to reduce a clock rate of the signal and a filter; a switchable bypass branch operably coupled to switchably bypass a portion of the plurality of signal processing elements; and a control element configured to cause the bypass branch to switchably bypass the portion of the plurality of signal processing elements as a function of a transmission mode of the signal.
 98. The apparatus according to claim 97, wherein the portion of the plurality of signal processing elements includes the filter.
 99. The apparatus according to claim 97, wherein the portion of the plurality of signal processing elements includes the one or more elements configured to reduce the clock rate of the signal.
 100. An apparatus configured to decimate a signal, comprising: a plurality of signal processing elements connected in series operably coupled to receive the signal, the plurality of signal processing elements including one or more elements configured to reduce a clock rate of the signal and a filter having adjustable filtering parameters; and a control element configured to selectively adjust the adjustable filtering parameters as a function of a transmission mode of the signal.
 101. The apparatus of claim 100, wherein the filter comprises a low-pass filter and the adjustable filtering parameters include a threshold frequency of the low-pass filter.
 102. The apparatus of claim 100, wherein the filter comprises a finite impulse response filter and the adjustable filtering parameters comprise at least one of the group consisting of filtering coefficients and a scaling factor.
 103. The apparatus of claim 100, wherein the adjustable filtering parameters include an order of the filter.
 104. An apparatus configured to decimate a signal, comprising: a plurality of signal processing elements connected in series operably coupled to receive the signal, the plurality of signal processing elements including one or more elements configured to reduce a clock rate of the signal by a specific factor and a filter; and a control element configured to selectively adjust the specific factor as a function of a transmission mode of the signal.
 105. The apparatus of claim 104, wherein the plurality of signal processing elements includes a digital-to-analog converter.
 106. The apparatus of claim 105, wherein the analog-to digital converter comprises a sigma-delta modulator.
 107. The apparatus of claim 105, wherein the digital-to-analog converter is configured to operate using a fixed clock rate independent of the transmission mode. 